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A new bulk-driven input stage design for sub 1-volt CMOS op-amps

Haga, Yasutaka and Morling, Richard C.S. and Kale, Izzet (2006) A new bulk-driven input stage design for sub 1-volt CMOS op-amps. In: 2006 IEEE International Symposium on Circuits and Systems. ISCAS 2006. Proceedings. IEEE, Los Alamitos, USA, pp. 1547-1550. ISBN 0780393902


Official URL: http://dx.doi.org/10.1109/ISCAS.2006.1692893


This paper presents a new design approach for a rail-to-rail bulk-driven input stage using a standard single-well (n-well in this paper) CMOS technology. This input stage can provide nearly constant transconductance and constant slew rate over the entire input common-mode voltage, operating with a wide supply voltage ranging from sub 1-volt (V/sub T0/+ 3V/sub DSsat/) to the maximum allowed for the CMOS process, as well as preventing latch-up.

Item Type:Book Section
Uncontrolled Keywords:CMOS analogue integrated circuits, operational amplifiers, 1 V, CMOS op-amps, single-well CMOS technology
Research Community:University of Westminster > Electronics and Computer Science, School of
ID Code:3340
Deposited On:19 Feb 2007
Last Modified:11 Aug 2010 15:31

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