Cadenas, Oswaldo and Megson, Graham M. and Jones, David J. (2005) FPGA organization for the fast path-based neural branch predictor. In: 2005 IEEE International Conference on Field-Programmable Technology, National University of Singapore, Singapore, 11-14 Dec 2008: proceedings. IEEE, pp. 251-257. ISBN 0780394070
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Official URL: http://dx.doi.org/10.1109/FPT.2005.1568555
| Item Type: | Book Section |
|---|---|
| Uncontrolled Keywords: | Field programmable gate arrays, logic design, neural nets, FPGA organization, logic resources, misprediction latency, path-based neural branch predictor, prediction latency, prediction table |
| Research Community: | University of Westminster > Electronics and Computer Science, School of |
| ID Code: | 5718 |
| Deposited On: | 27 Jan 2009 12:53 |
| Last Modified: | 19 Oct 2009 14:14 |
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