Megson, Graham M. and Chen, Xian (1995) A synthesis method of LSGP partitioning for given-shape regular arrays. In: Proceedings of the 9th International Parallel Processing Symposium, April 25-28, 1995, Santa Barbara, California. IEEE, Los Alamitos, USA, pp. 234-238. ISBN 0818670746
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Official URL: http://dx.doi.org/10.1109/IPPS.1995.395938
Abstract
This paper presents a method to partition and map a computational polytope onto processor arrays. Based on the theoretical framework of an existing LSGP method, a systematic design procedure is proposed which constructs an activity matrix, proposed by Darte, according to the shapes of the computational polytope and the processor array and derives a valid timing vector. By this method the given-shape mapping can be achieved with neither difficulty nor exhausted computations by removing the need to compute HNFs.
| Item Type: | Book Section |
|---|---|
| Uncontrolled Keywords: | Data structures, parallel algorithms, systolic arrays, LSGP partitioning, activity matrix, computational polytope given-shape regular arrays, locally sequential globally parallel, processor arrays, timing vector |
| Research Community: | University of Westminster > Electronics and Computer Science, School of |
| ID Code: | 5731 |
| Deposited On: | 27 Jan 2009 16:40 |
| Last Modified: | 19 Oct 2009 16:43 |
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