Haga, Yasutaka and Kale, Izzet (2009) CMOS buffer using complementary pair of bulk-driven super source followers. Electronics Letters, 45 (18). pp. 917-918. ISSN 0013-5194Full text not available from this repository.
A power-efficient rail-to-rail CMOS analogue voltage buffer is presented. It consists of a complementary pair of super source followers, but a bulk-driven input device with the replica-biased scheme is utilised to eliminate the DC level shift, quasi-floating gate transistors to achieve class-AB performance, and a current switch which shifts between the complementary pair to allow rail-to-rail operation. The proposed buffer has been designed for a 0.35 µm CMOS technology to operate at a 1.8 V supply voltage. Simulated results are provided to demonstrate the total harmonic distortion for a 1.6 Vpp 100 kHz sine wave with a 68pF load is as low as ?46 dB, while the static current consumption remains under 8 µA.
|Subjects:||University of Westminster > Science and Technology > Electronics and Computer Science, School of (No longer in use)|
|Depositing User:||Miss Nina Watts|
|Date Deposited:||29 Jan 2010 10:36|
|Last Modified:||29 Jan 2010 10:36|
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