Efficient FPGA implementation of an adaptive IQ-imbalance corrector for communication receivers using reduced range multipliers

Cetin, E., Demirsoy, S.S., Kale, I. and Morling, R.C.S. (2005) Efficient FPGA implementation of an adaptive IQ-imbalance corrector for communication receivers using reduced range multipliers. In: 13th European Signal Processing Conference (EUSIPCO), 04-08 Sep 2005, Antalya, Turkey.

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Item Type: Conference or Workshop Item (Paper)
Subjects: University of Westminster > Science and Technology
SWORD Depositor: repository@westminster.ac.uk
Depositing User: repository@westminster.ac.uk
Date Deposited: 01 Dec 2005
Last Modified: 30 Jun 2016 11:29
URI: http://westminsterresearch.wmin.ac.uk/id/eprint/919

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