Synthesis of reconfigurable multiplier blocks: part I: fundamentals

Demirsoy, Suleyman S. and Kale, Izzet and Dempster, Andrew G. (2005) Synthesis of reconfigurable multiplier blocks: part I: fundamentals. In: IEEE International Symposium on Circuits and Systems 2005. IEEE Computer Society, Piscataway, N.J., USA, 536 -539. ISBN 0780388348

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Official URL: http://dx.doi.org/10.1109/ISCAS.2005.1464643

Abstract

Reconfigurable Multiplier Blocks (ReMB) offer significant area, delay and possibly power reduction in time multiplexed implementation of multiple constant multiplications. This paper and its companion paper (subtitled Part II- Algorithm) together present a systematic synthesis method for Single Input Single Output (SISO) and Single Input Multiple Output (SIMO) ReMB designs. This paper presents the necessary foundation and terminology needed for developing a systematic synthesis technique. The companion paper illustrates the synthesis method through examples. The method proposed achieves reduced logic-depth and area over standard multipliers / multiplier blocks.

Item Type: Book Section
Subjects: University of Westminster > Science and Technology > Electronics and Computer Science, School of (No longer in use)
Depositing User: Users 4 not found.
Date Deposited: 01 Dec 2005
Last Modified: 11 Aug 2010 14:29
URI: http://westminsterresearch.wmin.ac.uk/id/eprint/966

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