Kalantery, Nasser and Winter, Stephen and Wilson, Derek R. (1995) From BSP to a virtual von Neumann machine. Computing & Control Engineering Journal, 6 (3). pp. 131-136. ISSN 0956-3385
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Official URL: http://dx.doi.org/10.1049/cce:19950307
The BSP (bulk synchronous parallel) architecture incorporates a scalable and transparent communication model. The task-level synchronisation mechanism of the machine, however, is not transparent to the user and can be inefficient when applied to the co-ordination of irregular parallelism. This article presents a discussion of an alternative memory-level scheme which offers the prospect of achieving both efficient and transparent synchronisation. The scheme, based on a discrete-event simulation paradigm, supports a sequential style of programming and, coupled with the BSP communication model, leads to the emergence of a virtual von Neumann parallel computer.
|Research Community:||University of Westminster > Electronics and Computer Science, School of|
|Deposited On:||20 Sep 2011 12:46|
|Last Modified:||20 Sep 2011 12:46|
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