Kalantery, Nasser and Winter, Stephen and Wilson, Derek R. (1995) From BSP to a virtual von Neumann machine. In: Halatsis, Costas and Maritsas, Dimitrios and Philokyprou, George and Theodoridis, Sergios, (eds.) PARLE'94 Parallel Architectures and Languages Europe: 6th International PARLE Conference Athens, Greece, July 4–8, 1994, Proceedings. Lecture notes in computer science (817). Springer, pp. 785-788. ISBN 3540581847
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Official URL: http://dx.doi.org/10.1007/3-540-58184-7_157
Bulk synchronous parallel architecture incorporates a scalable and transparent communication model. The task-level synchronization mechanism of the machine, however, is not transparent to the user and can be inefficient when applied to the coordination of irregular parallelism. This paper presents a brief introduction to an alternative memory-level scheme which offers the prospect of achieving both efficient and transparent synchronization. This scheme, based on a discrete event simulation paradigm, supports sequential style of programming and, coupled with the BSP communication model, leads to the emergence of a virtual von Neumann parallel computer.
|Item Type:||Book Section|
|Research Community:||University of Westminster > Electronics and Computer Science, School of|
|Deposited On:||21 Sep 2011 14:20|
|Last Modified:||21 Sep 2011 14:20|
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